Talk:Tutorials/Advanced redstone circuits

Looks great. I'm going to tidy it up a bit. Like put how many XNOPR gates and such ares used into a table or something. Metalhannes 19:48, 26 November 2010 (CST)

Moving Combination Locks
Is it okay if I move the combination locks section to their own page? I want to add a few more examples, but I feel they would just clutter up this page. Bleachisback 19:49, 30 November 2010 (UTC)


 * See Talk:Redstone_circuits. I'm working on redoing all of the redstone circuits and mechanisms pages. I haven't gotten to rewriting this page yet, but I would say go ahead and add to it now. I'll move it around or clean it up soon. A combination lock would probably go into the "other redstone components" page once they're all organized.
 * --YEAH TOAST 20:16, 30 November 2010 (UTC)

MUX
I think a MUX diagram would be quite useful, either here or at Redstone circuits. A 2x1 MUX is easy to construct from 3 NOR gates and a single inverter.

I have a pic of one. Should I put the section in this page or at Redstone circuits? EDIT: I put it at Redstone Circuts under "Other". Please move it if there is a better location for it.

power.5000@live.com:"hey i need some help with the mux i do not understand this new compact version can i please get a tutorial or a more indepth description i understand the 4 channel 2 bit one very well just not this one"

Locks
--Maxpm 14:07, 18 December 2010 (CST)
 * The lock diagrams here seems extremely overcomplicated.
 * A more obvious distinguishment should be made between the sequence locks (called "order-sensitive") and the combination locks by making the combination lock use levers instead of buttons.
 * The sequence lock should be simplified using "RS-NOR chaining."
 * Yah, I agree that the sequence lock is too complicated. It would be a lot simpler to use AND gates than inverters and XORs, and the enter button (if used) could also just be connected with an AND gate and then to the door. I'm going to change the description of the lock to reflect this, but hopefully someone else with the time too could remake a diagram.
 * --Zrowny 02:40, 1 February 2011 (UTC)
 * Eh, screw that, I just got rid of the example altogether. I still hope someone will make a new diagram for the lock.
 * --Zrowny 02:50, 1 February 2011 (UTC)

@Gnu32: Why the section has been deleted? : For better understanding, see:. Using following program: --gu471 14:51, 01 March 2011 (UTC)

Suggestion: Rename "Computation" to "Adders"
When other computation circuits are created, create separate sections for them. DiEvAl 18:30, 31 December 2010 (UTC)

Guess what. Inverting an input as described here on the adders doesn't turn it into a subtractor. Clear up how the hell you do this. It says you can invert any of the signals, which to me means I could just not invert A (A is inverted on the adder). Or do I have to invert both? Or just B? Clear this up. - flyingcow93g


 * The easiest thing to do would be to rename A and B to B and A, respectively, not invert what is now B, set the carry in bit to 1, and ignore the carry out bit, resulting in A + (NOT B) + 1, or A - B. In two's complement, negative numbers are actually the larger numbers whose most-significant bit is 1, so X * -1 would be (NOT X) + 1, where X is a binary number.--Someone Else 37 19:36, 11 June 2012 (UTC)

Alternate Half-Adder Design
I created this half-adder when I found that the XOR gate design F includes an AND gate- the middle torch will only be on if both of the inputs are. However, this torch is completely inaccessible as an output. However, it was not hard to put another torch on the side. I also submit this because I find the existing half-adder design completely unintelligible. The schematic I have uploaded shows as many layers as possible in each frame, and none of the inputs or outputs are inverted.

This design appears to save a little space and redstone. The carry bit is shown extending to the left, so it can easilt be fed into another half-adder. This could easily be redirected upwards, instead. I chose not to include a full-adder design, mainly because MCRedstoneSim wouldn't copy the whole column.--Someone Else 37 19:36, 11 June 2012 (UTC)

Combining Demultiplexer and Logic Units
It seems that the content of those two sections are practically identical, although the circuit designs are widely varied. Could we combine those into a single section and discuss the practical benefits of each design?

--Noobaholic 24 March 2010 16:32 EST

Binary to BCD
Does anybody have a design for such a decoder? if so, please place it in the article under misc.

Half-Adder image fail
It seems that the half-adder on this page is a copy of XNOR gate Design A featured on the regular Redstone Circuits page; unfortunately, an XNOR gate does not work as a half-adder. Re:Yes it will use 2 xnors connected by a carry line. This works b/c 2 - make a +. I Hoped u learned something here.

Move and add
Multiple subjects here. First off, maybe this page should be moved to Tutorials/Mechanisms since it's somewhat related to that. Second off, I propose adding more mechanisms and bits and pieces of computers, should the tutorials be wiped out, so that they can finish it themselves. For instance, adding things such as an ALU with a multiplier and a divider. 173.206.188.202 23:36, 3 December 2012 (UTC)


 * The dividing line between "circuit" and "mechanism" can be fuzzy, but I think that adders, ALUs, and base converters should be considered circuits rather than mechanisms, simply because their purpose is to process information rather than manipulate the player's environment. Combination locks make more sense as mechanisms though.
 * I would strongly encourage any work that replaces embedded videos with images and/or schematics. Especially in Tutorials/Mechanisms -- that "article" is a browser-killer and needs the same kind of cleaning and re-org/split that Redstone Circuits got. &mdash;Munin295 &middot; Grid_Book_and_Quill.png Grid_Stone_Pickaxe.png &middot; 00:30, 4 December 2012 (UTC)

Tips and tutorials for speeding up information processing?
I thought that perhaps this should include a section of fast-to-instant-action processing circuits, for instance advanced ALUs and permawire-to-pulse-and-back converters. Should this be added? 173.206.7.200 03:43, 4 February 2013 (UTC)

Wrong overflow detection!
The last adder in the adder section has a wrong overflow detection.

For example, consider the following addition:

-1 + 1 = 0 (no overflow)

In Binary : 1111 1111 0000 0001 --- 11111 1110 --- 10000 0000 (no overflow! Correct result!)

But your adder circuit would output an OF.

My proposal is you assign the input ports of the most left xor to the carry outs of the last carry out and the carry out before.

Overflow doesn't mean that the last carry out is set to true. It means that you got the wrong result.

Your version only allows the correct addition / substraction of two unsigned integers. My version would allow addition/substraction of two signed integers.