Tutorials/Advanced redstone circuits

Advanced electronic mechanisms are mechanisms that deal with more complicated Redstone circuitry. For simpler mechanisms, see Tutorials/Mechanisms, Tutorials/Traps, and Redstone.

Order Insensitive Combination Locks
A door that opens when a certain combination of buttons/levers are on. (Note: A moderate understanding of logic gates is needed for this device.)

RSNOR Combo Lock
Connect a series of buttons to the S-input of RS Latches. Feed the Q or Q (choose which one for each latch to set the combination) outputs of the RS Latches into a series of AND gates, and connect the final output to an iron door. Finally, connect a single button to all the R-inputs of the RS Latches. The combination is configured by using either Q or Q for each button (Q means that the button would need to be pressed, Q don't press) Example:



With the automated reset it causes the correct combo to cause a pulse instead of a "always on" until reset.

Example
How to (pdf) work the logic for an combo lock out. And implementation (youtube) in minecraft.

AND Combo Lock
The AND based combo lock uses switches and NOT gate inverters instead of the RSNOR latches in the previous design. This makes for a simpler design but becomes less dynamic in complicated systems and it also lacks an automated reset. The AND design is configured by adding inverters to the switches. Example:

OR Combo Lock
The OR combo lock is actually a AND combo lock without unnecessary repeaters, override lever and last inverter. Output is off when the code is correct.

Due to its compact size and fast response time, this combination lock is also ideal for use as an address decoder in the construction of addressable memory (RAM)

Design A. Code is set by torches on inputs (1001):



You can expand on this by creating a new level on top of the first and using the same principle as the first level, keep creating them.

Design B. Code is set by inverters in the blue area (001001):



N - number of inputs. K - number of 1's in code.

Order-sensitive RSNOR Combo Lock
A door that opens when buttons are pressed in certain order.

(Note: A moderate understanding of logic gates is needed for this device.)

Make a series of buttons, and connect only one to an RSNOR latch. Then connect both the RSNOR latch and a second button to an AND Gate, which feeds to another RSNOR latch. Do this continually until you have either filled all of the buttons or are satisfied with the lock. Connect the final RSNOR latch to a separate AND Gate with a signal from an enter button. Feed that to the output RSNOR latch. Then connect any of the left-over buttons to the enter button and send reset signals to all of the RSNOR latches. A pressure plate next to a door can reset the door.

Binary to Decimal (Demultiplexer)
A series of gates that convert a 3bit binary input from inputs into a decimal output from 0-7. Useful in many ways as they are compact 5x5x3 at the largest.

These can be linked in a series from one input source but it is recommended to place an inverter before each input into the circuit to keep them isolated from interacting with the other circuits since some drive a combination of High and Low current.

Need clarification but some of these may also work as Tri State buffers or as close as possible with redstone depending on your setup.

HexaDecimal to Binary (Multiplexer)
You also can convert a Hexadecimal signal to a 4bit-binary signal. Here you don't need any gates, except separating ORs. Therefore you have to put the input trough a block. From this put lines trough the bit lines. And separate these from input via (Not-Not)-gate or a diode. The most suitable point to separate is directly after the point you differentiate the input trough the output lines. You have to separate these lines, in order that the bit-illustration will be correct.

Now you got the 4-bit converted signal in the four lines. To get a Octal2Binary-MUXer, just ignore the entries, where the 4-bit-line is 1.

Example


The example on the right uses ORs (>=1), XNORs (=), RS-NOR latches (SR) and some delays (dt*). For the XNORs I would prefer the C-design.

The example on the right uses a 4-bit design, so you can handle a hexa-decimal key. So you can use 15 various digits, [1,F] or [0,E]. You only can use 15, because the state (0)h == (0000)2 won't activate the system. If you want to handle 16 states, you edit the logic, to interact for a 5-bit input, where the 5th bit represents the (0)h state.

In the following we'll use (0)h := (1111)2. And for [1,9] the MUX-table upon. So the key uses decimal digits. Therefore we have to mux the used buttons to binary data. Here look trough the first two columns. The first represents the input-digit in (hexa)decimal, the second represents the input-digit in binary code. Here you can add also buttons for [A,E], but I disclaimed them preferring a better arranging. The /b1\-box outputs the first bit, the /b2\-box the second, and so on.

Now you see Key[i] with i=1..3, here you set the key you want to use. The first output of them is the 1-bit, the second the 2-bit and so on. You can set your key here with levers in binary-encryption. Use here the MUX-table upon, and for (0)h := (1111)2. If we enter the first digit, we have to compare the bits by pairs (b1=b1, b2=b2, b3=b3, b4=b4). If every comparison is correct, we set the state, that the first digit is correct.

Therefore we combine (((b1=b1 & b2=b2) & b3=b3) & b4=b4) =: (b*=b*). In minecraft we have to use four ANDs like the left handside. Now we save the status to the RS-latch /A\. The comparison works the same way for Key[2], and Key[3].

Now we have to make sure, that the state will be erased, if the following digit is wrong. Therefore we handle a key-press-event (--/b1 OR b2 OR b3 OR b4\--/dt-\--/dt-\--). Search the diagram for the three blocks near "dt-". Here we look, if any key is pressed, and we forward the event with a minor delay. For resetting /A\, if the second digit is wrong, we combine (key pressed) & (not B). It means: any key is pressed and the second digit of the key is entered false. Therewith /A\ will be not reseted, if we enter the first digit, /A\ only should be reseted, if /A\ is already active. So we combine (B* & A) =: (AB*). /AB*\ now resets the memory-cell /A\, if the second digit is entered false and the first key has been already entered. The major delay /dt+\ must be used, because /A\ resets itself, if we press the digit-button too long. To prevent this failure for a little bit, we use the delay /dt+\. The OR after /AB*\ is used, for manually resetting, i.e. by a pressure plate.

Now we copy the whole reset-circuit for Key[2]. The only changes are, that the manually reset comes from (not A) and the auto-reset (wrong digit after), comes from (C). The manual reset from A prevents B to be activated, if the first digit is not entered. So this line makes sure, that our key is order-sensitive.

The question is, why we use the minor-delay-blocks /dt-\. Visualize /A\ is on. Now we enter a correct second digit. So B will be on, and (not B) is off. But while (not B) is still on, the key-pressed-event is working yet, so A will be reseted, but it shouldn't. With the /dt-\-blocks, we give /B\ the chance to act, before key-pressed-event is activated.

For /C\ the reset-event is only the manual-reset-line, from B. So it is prevented to be activated, before /B\ is true. And it will be deactivated, when a pressure-plate resets /A\ and /B\.

pros and cons:

Not really a con: in this circuit the following happens with maybe the code 311: 3 pressed, A activated; 1 pressed, B activated, C activated. To prevent this, only set a delay with a repeater between (not A) and (reset B). So the following won't be activated with the actual digit.

If you fix this, the circuit have the following skill, depending on key-length. ( ||digit|| = 2n-1, possibilities: ||digit||Length )

Computation
Using logic gates, we can arrange them to make binary calculations, like in a computer. When using the gates below, mind the inputs and outputs. You may be wondering why there are so many inverted signals being used instead of the regular signal. The adders below use XNOR gates rather than XOR gates because they are more compact. As a result, IMPLIES gates must be used instead of an AND gate, which also happen to be more compact. Therefore for the most compact adder, inverse signals must be used. These adders are too complex to be easily deciphered with 2 layers per square, so each single layer has been drawn separately to ease the building process.

Half Adder


Gates: XNOR, IMPLIES

Torches: 12

Redstone: 7

Blocks: 19

Size: 5X4X4

This adder will take 2 bits and add them together. The resulting bit will be the output of S (sum). If both bits are 1, there will be a carry over, and C will become 1 ( C will become 0). This half adder can be modified to create a non inverted C output, but this configuration is used so that it can be implemented as the start of a chain of full adders.

an alternate option for an Half Adder:



Gates: AND 2x, OR, INVERT

Torches: 6

Redstone: 19

Blocks: 10

Size: 8x6x3

Like the previous mentioned half adder, it take 2 bits as input, outputs C(arry) and the S(um).

Full Adder (1 Bit Adder)
AS A FOREWARNING THIS DESIGN IS WRONG! It uses an OR instead of an AND to combine the two half adders.



Gates: XNOR (2), IMPLIES, NOT, OR, AND

Torches: 16

Redstone: 32

Blocks: 48

Size: 6X12X5 Ceiling to floor, including I/O spaces.

This adder will take 2 bits and a carried over bit (actually C, rather than C, a value held in the redstone in the bottom left corner on layer 1) and add them all together, producing a sum (S) bit and a carry (actually C rather than C).

4 Bit Adder


'''Note! The least significant digit ("ones" digit) is on the left of the diagram so that the progression from half adder to the full adders can be seen more clearly. Reverse the diagram if you want a conventional left to right input.'''

Gates: XNOR (7), IMPLIES (4), NOT (4), OR (3), AND (3)

Torches: 56

Redstone: 108

Blocks: 164

Size: 23X12X5

This adder will take 2, 4 bit numbers (A and B) and add them together, producing a sum (S) bit for each bit added and a carry (C) for the whole sum. The sum bits are in the same order as the input bits, which on the diagram means that the leftmost S output is the least significant digit of the answer. This is just an example of a string of adders; adders can be strung in this way to add bigger numbers as well.

An alternate 4-bit adder using the alternate full and half adders.



Alternate Full Adder


Source: "red stuff" logic gates

Carry input and output are aligned to easily connect many of these modules in series.

Torches: 14

Redstone wire: 15

Size: 5x6x3

Logic units
In circuits, it might be useful to have a logic unit that will, based on the input, decide which output is to be chosen. Such unit can be then used for more complex circuits such as ALU.

This is the example of 2-bit logic unit that will have 4 states depending on the input.



The outputs are in top row, with 11, 00, 01, 10 order (input order: first first, bottom second).

This is another example of a simplified version using Gray codes. The output appears at the torches at the end of the top rows. This design can be extended to any number of bits, but practical limitations due to timing considerations restrict the use of more than a byte or so. The outputs are trigged by the inputs 11, 01, 00, 10, respectively.



Related pages

 * Redstone
 * Redstone (wire)
 * Redstone (ore)
 * Redstone (dust)
 * Redstone Torch
 * Redstone circuits
 * Mechanisms
 * Traps